R. K. Sharma, National Institute of Technology, Kurukshetra

Low Power: A Critical Technological Need

National Institute of Technology, Kurukshetra, E-mail:  rksharma@nitkkr.ac.in

As the “on the move with anyone, anytime, and anywhere” era becomes a reality, portability and performance become essential features of the electronic systems interfacing with nonelectronic systems, emphasizing efficient use of energy as a major design objective. Power management is becoming an increasingly urgent problem for almost every category of design, as power density, rises at an alarming rate.  Effective energy management must be built into the system design starting at the architecture stage; and low-power techniques need to be employed at every stage of the design, from RTL to GDSII. Modern VLSI designs are always expected to be simultaneously low power and high performance. The packaging and cooling costs, power density and reliability issues associated with high power and high performance systems also force designers to look for ways to reduce power consumption. In fact, there has to be a trade-off between power and performance. Like general low-pollution world, power consumption in microelectronic systems has to be kept as little as possible. Numerous hardware/software techniques have been developed for drastically reducing functional power dissipation and improving energy efficiency at all levels of the design hierarchy, starting from the lower levels of abstraction, when the opportunity to save power is significant. ITRS has identified low power design techniques as a critical technological need. The higher the level of abstraction when power is taken into account, the greater the power efficiency that can be gained, because there is more freedom to make large changes to the design implementation. Finally, due to the increasing percentage of electrical energy usage for computing and communication in the modern workplace, low-power design is in line with the increasing global awareness of environmental concerns.

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